Operating System Subcategories

Memory Management Swapping 1	Process Scheduling Queue
Virtual Memory Page Replacement Algorithms 1	Linux
Cpu Scheduling	Memory Management
Computer Fundamentals	Cpu Scheduling Benefits
Threads Signal Handling	Threads Ult Klt
Distributed Operating System	Basics
Operating System	Processes
Cpu Scheduling Algorithms 1	Cpu Scheduling Algorithms 2
Deadlock	Deadlock Avoidance
Memory Management Swapping 2	Memory Allocation 1
Secondary Storage	Memory Management Paging 1
Memory Management Paging 2	Rtos
Multimedia System Cpu Disk Scheduling	Security Intrusion Detection
Virtual Memory Thrashing	File System Interface Access Methods 1
File System Interface Directory Structure 1	File System Interface Directory Structure 2
File System Interface Mounting Sharing	File System Allocation Methods 1
Disk Scheduling 2	Disk Management
Classic Sync Problems	Semaphores 1
Process Creation	Multimedia System Network Management
Semaphores 2	Cpu Scheduling 2
Application Io Interface 1	Inter Process Communication
Process Synchronization	Multimedia System Compression 1
Network File System 1	Disk Scheduling 1
Mass Storage Raid 1	File System 1
Communication Systems Bandwidth Transmission Medium	Security Cryptography
Two Port Network	Process Rpc
Virtual Memory Page Replacement Algorithms 2	Virtual Memory Frame Allocation
Network File System 2	File System Allocation Methods 2
File System Allocation Methods 3	Process Control Block
Process Structures	Critical Section Problem
Process Sync Monitors	Atomic Transactions
Deadlock Recovery	Memory Allocation 2
Memory Management Segmentation	Application Io Interface 2
Kernel Io Subsystems	Multimedia System Compression 2
Multimedia System Compression 3	Security User Authentication
Security Program System Threats	Security System Facility
Threads Fork Exec	Threads Cancellation
Threads Pools	Multi Threading Models
Virtual Memory Demand Paging	Virtual Memory
File System Concepts	File System Implementation
File System Interface Access Methods 2	File System Recovery
Io Subsystem	Swap Space Management
Mass Storage Raid 2	Mass Storage Tertiary Storage
Protection Concepts	Protection Access Matrix
Security	Protection Memory Protection
Protection Revocation Access Rights	Network Structure Topology
Robustness	Distributed File System
Distributed Synchronization	Deadlock Prevention
Deadlock Detection	Threads
File System Interface Protection	File System Free Space Performance

The initial program that is run when the computer is powered up is called __________

A. Boot program
B. Bootloader
C. Initializer
D. Bootstrap program

How does the software trigger an interrupt?

A. Sending signals to cpu through bus
B. Executing a special operation called system call
C. Executing a special program called system program
D. Executing a special program called interrupt trigger program

What is a trap/exception?

A. Hardware generated interrupt caused by an error
B. Software generated interrupt caused by an error
C. User generated interrupt caused by an error
D. None of the mentioned

What is an ISR?

A. Information service request
B. Interrupt service request
C. Interrupt service routine
D. Information service routine

What is an interrupt vector?

A. It is an address that is indexed to an interrupt handler
B. It is a unique device number that is indexed by an address
C. It is a unique identity given to an interrupt
D. None of the mentioned

DMA is used for __________

A. High speed devices(disks and communications network)
B. Low speed devices
C. Utilizing cpu cycles
D. All of the mentioned

In a memory mapped input/output __________

A. The cpu uses polling to watch the control bit constantly, looping to see if a device is ready
B. The cpu writes one data byte to the data register and sets a bit in control register to show that a byte is available
C. The cpu receives an interrupt when the device is ready for the next byte
D. The cpu runs a user written code and does accordingly

In a programmed input/output(PIO) __________

A. The cpu uses polling to watch the control bit constantly, looping to see if a device is ready
B. The cpu writes one data byte to the data register and sets a bit in control register to show that a byte is available
C. The cpu receives an interrupt when the device is ready for the next byte
D. The cpu runs a user written code and does accordingly

In an interrupt driven input/output __________

A. The cpu uses polling to watch the control bit constantly, looping to see if a device is ready
B. The cpu writes one data byte to the data register and sets a bit in control register to show that a byte is available
C. The cpu receives an interrupt when the device is ready for the next byte
D. The cpu runs a user written code and does accordingly

In the layered approach of Operating Systems __________

A. Bottom layer(0) is the user interface
B. Highest layer(n) is the user interface
C. Bottom layer(n) is the hardware
D. Highest layer(n) is the hardware