Consider a computer with 8 Mbytes of main memory and a 128K cache. The cache block size is 4 K. It uses a direct mapping scheme for cache management. How many different main memory blocks can map onto a given physical cache block?

A. 2048
B. 256
C. 64
D. 8

A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address because ____________

A. It reduces the memory access time to read or write a memory location
B. It helps to reduce the size of page table needed to implement the virtual address space of a process
C. It is required by the translation lookaside buffer
D. It helps to reduce the number of page faults in page replacement algorithms