An I/O port typically consists of four registers status, control, ________ and ________ registers.

• A. System in, system out
• B. Data in, data out
• C. Flow in, flow out
• D. Input, output

The ______ register is read by the host to get input.

• A. Flow in
• B. Flow out
• C. Data in
• D. Data out

The ______ register is written by the host to send output.

• A. Status
• B. Control
• C. Data in
• D. Data out

The hardware mechanism that allows a device to notify the CPU is called _______

• A. Polling
• B. Interrupt
• C. Driver
• D. Controlling

The CPU hardware has a wire called __________ that the CPU senses after executing every instruction.

• A. Interrupt request line
• B. Interrupt bus
• C. Interrupt receive line
• D. Interrupt sense line

The _________ determines the cause of the interrupt, performs the necessary processing and executes a return from the interrupt instruction to return the CPU to the execution state prior to the interrupt.

• A. Interrupt request line
• B. Device driver
• C. Interrupt handler
• D. All of the mentioned

In general the two interrupt request lines are ____________

• A. Maskable & non maskable interrupts
• B. Blocked & non maskable interrupts
• C. Maskable & blocked interrupts
• D. None of the mentioned

The _________ are reserved for events such as unrecoverable memory errors.

• A. Non maskable interrupts
• B. Blocked interrupts
• C. Maskable interrupts
• D. None of the mentioned

In rate monotonic scheduling ____________

• A. Shorter duration job has higher priority
• B. Longer duration job has higher priority
• C. Priority does not depend on the duration of the job
• D. None of the mentioned

In which scheduling certain amount of CPU time is allocated to each process?

• A. Earliest deadline first scheduling
• B. Proportional share scheduling
• C. Equal share scheduling
• D. None of the mentioned